Job Description

2 months ago Be among the first 25 applicants

Get AI-powered advice on this job and more exclusive features.

Job Title: SoC Design Verification Engineer

Locations: San Jose, CA or Remote

Job Title: SoC Design Verification Engineer

Locations: San Jose, CA or Remote

Full-Time: Salary + Benefits + Bonuses

Responsibilities

• Testbench development - System Verilog UVM and C tests
• Integration/development of C tests/APIs and SW build flow
• Integration/development of UVM mailboxes and HW/SW communication components
• Integration of lower level UVM testbenches
• Test plan development
• Power Aware testbench development and simulations
• Seamless porting between simulation/emulation/prototyping platforms
• Regression setup and debug for RTL/Gate Level Netlist/UPF PA sim/Emulation/Proto
• Coverage collection and closure
• Working with cross functional teams (DV/Arch/Design/FW) to identify coverage scope

Minimum Qualifications

• 5+ years of experience in RTL Design and Verification area of which 2+ years of experience in SoC Design Verification and HW/SW verification
• Deep knowledge of System Verilog UVM and vertical testbench integration
• Knowledge of low level HW/SW interaction and debug
• Knowledge of multi CPU and debug architectures
• Knowledge on AHB, AXI and APB Amba protocols
• Experience with development of fully automated flows

Preferred Qualifications

• Experience with low level SW debug - disasm, Tarmac, trace
• Experience with RISC-V and ARM CPU architectures
• Experience with CoreSight architecture
• Experience with embedded SW low level concepts and debug - Tarmac, ROM, RAM, linkers, elf, disasm, code sections, cache, security
• Experience with coverage merging across simulation and emulation
• Experience with Power Aware and Gate Level Netlist in Emulation
• Experience with development of fully automated flows
• Experience with Gate Level Simulations
• Experience with Synopsys tools VCS & Verdi
• Python Scripting

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Semiconductor Manufacturing and Computer Hardware Manufacturing

Referrals increase your chances of interviewing at Encore Semi, Inc. by 2x

Sign in to set job alerts for “Design Verification Engineer” roles.

Mountain View, CA $132,000.00-$189,000.00 2 weeks ago

Physical Design Engineer, Custom Datapath

Sunnyvale, CA $183,000.00-$271,000.00 2 weeks ago

Mountain View, CA $183,000.00-$271,000.00 2 weeks ago

Sunnyvale, CA $114,000.00-$166,000.00 1 week ago

Mountain View, CA $132,000.00-$189,000.00 2 weeks ago

San Jose, CA $108,400.00-$154,200.00 3 days ago

Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago

San Jose, CA $136,000.00-$204,000.00 2 weeks ago

Mountain View, CA $113,000.00-$161,000.00 5 days ago

Sunnyvale, CA $114,000.00-$166,000.00 1 week ago

Santa Clara, CA $138,452.00-$190,100.00 3 days ago

San Jose, CA $149,600.00-$214,100.00 6 days ago

Sunnyvale, CA $142,000.00-$203,000.00 1 week ago

Santa Clara, CA $137,450.00-$203,800.00 4 days ago

Physical Design and Verification Engineer

Sunnyvale, CA $173,000.00-$249,000.00 1 week ago

Design Verification Engineer (Fulltime role only)

ML Hardware Architecture Modeling and Co-design Engineer

Sunnyvale, CA $132,000.00-$189,000.00 4 days ago

San Jose, CA $194,000.00-$410,000.00 1 week ago

CPU Verification Engineer (Multiple Locations)

We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.

#J-18808-Ljbffr

Job Tags

Full time, Remote work,

Similar Jobs